PickVidsBest Computer architecture & CPUs Videos
The 148 Computer architecture & CPUs videos here were recommended by different people across different months. Choose by who it is for: 8 introductory, 60 intermediate, 45 for a general viewer, and 35 for someone who wants the harder derivation. Most of them are a talk. What they share is that one speaker finishes a claim, and the examples exist to hold that claim up. Channels you will keep seeing include Linus Tech Tips, Ben Eater, Gamers Nexus.
Future Computers Will Be Radically Different (Analog Computing)
Veritasium explains why analog computing may suit AI workloads, covering old analog computers, The Analog Thing and Mythic's analog chips that use flash memory for neural network inference.
GPUs to Mars: Full-Scale Simulation of SpaceX's Mars Rocket Engine
SpaceX engineers present at NVIDIA's GPU Technology Conference on a multi-physics code that simulates the full-scale Raptor methane engine.
How does Computer Memory Work? 💻🛠
A 36-minute animated deep dive from Branch Education into how DRAM works.
Simon Peyton Jones: Data Parallel Haskell
Simon Peyton Jones explains nested data parallelism and Data Parallel Haskell, an approach to exploiting multicore and distributed hardware while keeping a simple single-control-flow programming model.
The Road to PS5
PS5 lead system architect Mark Cerny gives a deep dive into the PS5's architecture, covering its SSD, I/O, audio and design goals.
THE NVIDIA AI GPU BLACK MARKET | Investigating Smuggling, Corruption, & Governments
A Gamers Nexus investigative documentary on the black market for Nvidia AI GPUs, following smugglers, middlemen, and buyers, including reporting from China.
Building a 6800 CPU on an FPGA with nMigen (part 1)
The first part of Robert Baruch's series on building a 6800 CPU on an FPGA with nMigen, a Python-based hardware description language.
DEF CON 26 - Christopher Domas - GOD MODE UNLOCKED Hardware Backdoors in redacted x86
Christopher Domas presents research at DEF CON 26 showing a hidden alternate instruction set and undocumented hardware backdoor in some x86 processors, found on a third-party CPU.
CppCon 2017: Chandler Carruth “Going Nowhere Faster”
Chandler Carruth shows how to squeeze more performance out of already-optimized C++ code, covering how the CPU executes it.
John Hennessy and David Patterson 2017 ACM A.M. Turing Award Lecture
Hennessy and Patterson's 2018 Turing Award lecture at ISCA, A New Golden Age for Computer Architecture.
Robust-first computing: Beyond efficiency
Dave Ackley gives a high-level introduction to robust-first computing, which prioritizes robustness over efficiency in computer architecture.
[7] Jim Keller, Silicon Wizard 🧙♂️
Ian Cutress interviews chip architect Jim Keller about his time at AMD, Intel and elsewhere, management advice, design approach, Moore's Law and x86 versus Arm.
code::dive conference 2014 - Scott Meyers: Cpu Caches and Why You Care
Scott Meyers explains how CPU caches work and why they matter for performance, covering cache levels, access speeds, associativity, and effects in multithreaded code.
CppCon 2017: Fedor Pikus “C++ atomics, from basic to advanced. What do they really do?”
Fedor Pikus's CppCon 2017 talk on C++ atomics, looking at what they let the programmer express and what the hardware actually does.
25c3: The Ultimate Commodore 64 Talk
Michael Steil's 25C3 talk covers the Commodore 64's architecture, quirks and demoscene tricks in about an hour.
8-bit CPU control logic: Part 1
Ben Eater writes a program in a made-up machine language and walks through the control logic an 8-bit breadboard CPU needs to execute it.
27c3: Reverse Engineering the MOS 6502 CPU (en)
Michael Steil's 27c3 talk on reverse engineering the MOS 6502 from die shots into a transistor-level simulation, as in the Visual6502 project.
New computers don't speed up old code
Matthias Wandel tests old and new code on a range of PCs, including a new mini PC, to measure how much faster modern hardware really is.
Why Do Mainframes Still Exist? What's Inside One? 40TB, 200+ Cores, AI, and more!
Dave Plummer tours the IBM z16 mainframe from design through factory assembly, test lab, accelerators and water cooling.
ASPLOS Keynote: The Golden Age of Compiler Design in an Era of HW/SW Co-design by Dr. Chris Lattner
Chris Lattner's ASPLOS 2021 keynote on the golden age of compiler design in an era of hardware and software co-design, covering compiler infrastructure for accelerators and unifying hardware IRs.
Samsung SSD Awesomeness
A Samsung-backed viral demo that builds a fast computer from 24 256GB MLC SSDs in a RAID 0 array and shows the throughput results.
Jim Keller: The Future of Computing, AI, Life, and Consciousness | Lex Fridman Podcast #162
Lex Fridman interviews chip architect Jim Keller about the future of computing, AI, life and consciousness.
RAAIS 2017 - Simon Knowles, Co-Founder and CTO of Graphcore
Simon Knowles, co-founder and CTO of Graphcore, talks about "intelligence processors", chips designed specifically for machine learning.
C++ and Beyond 2012: Herb Sutter - atomic Weapons 2 of 2
Part two of Herb Sutter's C++ and Beyond 2012 session on atomic weapons, a deep dive into the C++ memory model, atomics, memory ordering, and hardware behavior.